Electrostatic discharge (ESD), a surge in current (negative or positive) that occurs when a large amount of current is applied to an integrated circuit, may cause substantial damage to, or even destruction of, the circuit. ESD events are particularly troublesome for BiCMOS RF (radio frequency) chips because of their low power requirements and extreme sensitivity. Therefore, on-chip ESD protection circuits for BiCMOS chips are essential.
Historically, there have been several approaches to noise isolation and ESD protection. These include: STI-bound P+/N-well diode structures (also known as STI-bound diodes); polysilicon MOSFET (metal oxide semiconductor field effect transistor) gate defined PN diode structures (also known as polysilicon bound diodes); N+ in P− substrate diodes, whether with a poly border or shallow trench isolation to define the edge (also known as N-well to substrate diodes). Such approaches may result in (1) creating a forward-biased PNP structure and injecting current into the substrate, which generates noise; (2) forming a vertical PNP structure with a common collector, which may have high leakage, may cause Darlington amplification effects, or may be temperature- or photo-sensitive; or (3) non-ideal turn-on voltage.
Accordingly, a need has developed in the art for structures that will provide noise isolation and ESD protection in RF or similar applications.